Template:CheahaTflops

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(correct flops/cycle for sandy bridge (gen4 and gen5))
 
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|Gen 4|| Intel Xeon E5-2680||align="right"| 3||align="right"| 2||align="right"| 8||align="right"| 48||align="right"| 2.70||align="right"| 8|| [http://ark.intel.com/products/64583 Intel Xeon E2680]
 
|Gen 4|| Intel Xeon E5-2680||align="right"| 3||align="right"| 2||align="right"| 8||align="right"| 48||align="right"| 2.70||align="right"| 8|| [http://ark.intel.com/products/64583 Intel Xeon E2680]
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|Gen 5|| Intel Xeon E5-2650||align="right"| 12||align="right"| 2||align="right"| 8||align="right"| 192||align="right"| 2.00||align="right"| 8|| [http://ark.intel.com/products/64590/Intel-Xeon-Processor-E5-2650-20M-Cache-2_00-GHz-8_00-GTs-Intel-QPI Intel Xeon E2650] (Nodes dedicated to [https://dev.uabgrid.uab.edu/wiki/OpenStackPlusCeph OpenStack+Ceph] with 10Gbs network)
 
|Gen 5|| Intel Xeon E5-2650||align="right"| 12||align="right"| 2||align="right"| 8||align="right"| 192||align="right"| 2.00||align="right"| 8|| [http://ark.intel.com/products/64590/Intel-Xeon-Processor-E5-2650-20M-Cache-2_00-GHz-8_00-GTs-Intel-QPI Intel Xeon E2650] (Nodes dedicated to [https://dev.uabgrid.uab.edu/wiki/OpenStackPlusCeph OpenStack+Ceph] with 10Gbs network)
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|Gen 6<sup>†</sup>|| Intel Xeon E5-2680 v3||align="right"| 96||align="right"| 2||align="right"| 12||align="right"| 2304||align="right"| 2.50||align="right"| 16|| [http://ark.intel.com/products/81908/Intel-Xeon-Processor-E5-2680-v3-30M-Cache-2_50-GHz Intel Xeon E5-2680 v3]
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|Gen 7<sup>††</sup>|| Intel Xeon E5-2680 v4||align="right"| 18||align="right"| 2||align="right"| 14||align="right"| 504||align="right"| 2.40||align="right"| 16|| [https://ark.intel.com/products/91754/Intel-Xeon-Processor-E5-2680-v4-35M-Cache-2_40-GHz Intel Xeon E5-2680 v4]
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{| class="wikitable"
 
{| class="wikitable"
|+Theoretical Peak Flops = (number of cores) * (clock speed) * (instructions per cycle)
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|+[http://en.wikipedia.org/wiki/FLOPS#Computing Theoretical Peak Flops] = (number of cores) * (clock speed) * (instructions per cycle)
 
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!Generation!!Theoretical Peak Tera-FLOPS
 
!Generation!!Theoretical Peak Tera-FLOPS
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|Gen 5||align="right"| 3.072
 
|Gen 5||align="right"| 3.072
 
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|'''Total TFLOPS'''||align="right"| 12.541
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|Gen 6<sup>†</sup>||align="right"| 110
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|Gen 7<sup>††</sup>||align="right"| 358
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<sup>†</sup> Includes four Intel Xeon Phi 7210 accelerators and four NVIDIA K80 GPUs.<br/>
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<sup>††</sup> Includes 72 [https://images.nvidia.com/content/tesla/pdf/nvidia-tesla-p100-PCIe-datasheet.pdf NVIDIA Tesla P100 16GB] GPUs.

Latest revision as of 16:02, 15 October 2017

Generation Type Nodes CPUs per Node Cores Per CPU Total Cores Clock Speed (GHz) Instructions Per Cycle Hardware Reference
Gen 2 Intel Xeon E5450 24 2 4 192 3.00 4 Intel Xeon E5450
Gen 3 Intel Xeon X5650 48 2 6 576 2.66 4 Intel Xeon E6550
Gen 4 Intel Xeon E5-2680 3 2 8 48 2.70 8 Intel Xeon E2680
Gen 5 Intel Xeon E5-2650 12 2 8 192 2.00 8 Intel Xeon E2650 (Nodes dedicated to OpenStack+Ceph with 10Gbs network)
Gen 6 Intel Xeon E5-2680 v3 96 2 12 2304 2.50 16 Intel Xeon E5-2680 v3
Gen 7†† Intel Xeon E5-2680 v4 18 2 14 504 2.40 16 Intel Xeon E5-2680 v4
Theoretical Peak Flops = (number of cores) * (clock speed) * (instructions per cycle)
Generation Theoretical Peak Tera-FLOPS
Gen 2 2.304
Gen 3 6.129
Gen 4 1.036
Gen 5 3.072
Gen 6 110
Gen 7†† 358

Includes four Intel Xeon Phi 7210 accelerators and four NVIDIA K80 GPUs.
†† Includes 72 NVIDIA Tesla P100 16GB GPUs.

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